1. Field of the Invention
The present invention relates to a method for manufacturing a wafer including a superficial silicon layer, an insulating layer containing oxide, and a silicon support arranged in that order. This type of wafer is referred to as a silicon-on-insulator wafer (hereinafter referred to as an SOI wafer).
2. Description of the Related Art
In recent years, the following wafers have been attracting much attention: wafers having a silicon-on-insulator (SOI) structure in which an oxide insulating layer is placed between a silicon support and a superficial silicon layer. These wafers are referred to as SOI wafers and are suitable for manufacturing substrates for high-performance transistors. Electronic devices including such SOI wafers have the following advantages: an increase in processing speed due to a reduction in junction capacitance, a reduction in electrical consumption, a reduction in operating voltage due to a decrease in substrate bias, an increase in resistance to soft error because of the complete separation of elements, the prevention of latch up, and the prevention of interference and noise due to substrates. That is, such electronic devices have high performance and reliability.
In order to further enhance the performance and reliability of the electronic devices, it is necessary to allow the interface between the superficial silicon layer and the insulating layer to have low interface state density.
The interface therebetween is usually reduced in interface state density in the same manner as gate insulating layers are formed and then heat-treated in a hydrogen atmosphere such that the interface state density of the gate insulating layers is reduced. This procedure is used to fabricate electronic devices such as MOSFETs on SOI wafers or used to fabricate such electronic devices on ordinary wafers such as CZ wafers or epitaxial wafers.
If an SOI wafer used to fabricate such electronic devices is treated in a hydrogen atmosphere, oxide contained in the insulating layer is reduced into oxygen, which permeates the superficial silicon layer. Oxygen precipitates are formed in the superficial silicon layer during heat treatment performed in a subsequent step, whereby the SOI wafer is deteriorated in quality. This probably leads to a deterioration in the performance and reliability of the electronic devices.
Japanese Unexamined Patent Application Publication No. 2002-26299 (hereinafter referred to as Patent Document 1) discloses a technique for allowing the interface between a superficial silicon layer and an insulating layer to have low interface state density without heat-treating an SOI wafer in a hydrogen atmosphere. In this technique, nitrogen precipitates having a predetermined nitrogen content are formed in the interface therebetween when the SOI wafer is used to fabricate electronic devices, whereby the interface therebetween is reduced in interface state density.
In the technique disclosed in Patent Document 1, since an oxynitride film is formed on the superficial silicon layer, the superficial silicon layer is reduced in thickness depending on the thickness of the oxynitride film. This leads to a deterioration in the quality of the SOI wafer. Therefore, electronic devices manufactured from the SOI wafer have low performance and reliability.
Thus, in order to enhance the performance and reliability of electronic devices manufactured from SOI wafers, it is necessary to manufacture an SOI wafer having low interface state density and high quality.